PDF results for "cray 1 processor"

1. [PDF] Computer Science 246 Computer Architecture

   SGI Challenge Shared memory Bus <=32 1 CRAY T3D Shared memory 3D Torus 64 ... Processor 0 Processor 1 0: ldw r1, lock 1: bnez r1, #0 // p0 sees ...
   www.eecs.harvard.edu/~dbrooks/cs246/cs246-lecture-multiprocessor.pdf — 2012-06-20T1

2. [PDF] LNCS 3514 - Vectorized Sparse Matrix Multiply for Compressed Row ...

   Eduardo F. DAzevedo1, Mark R. Fahey 2, and Richard ... merical experiments on the Cray X1 show an order of ... sparse matrix class locally uses Mat SeqAIJ on each processor.
   www.ornl.gov/~webworks/cppr/y2001/pres/124471.pdf — 2012-06-21T0

3. [PDF] Cache Implications of Aggressively Pipelined High Performance ...

   Cray-1S processor [9]. Hartstein and Puzak develop a for-mula and analyze the ... 3.1. Baseline Processor Conguration All aspects of the simulated processor except ...
   www.cs.utah.edu/~lambert/pdf/pipedepth.pdf — 2012-06-23T1

4. [PDF] Per-Core Performance Optimization

   Cray libsci for Cray systems SCSL for SGI systems Usually far ... Here are a few examples of processor-specific options. Intel 10.1 compilers:
   www.cac.cornell.edu/education/Training/Data09/Per-CorePerformance... — 2012-06-24T1

5. [PDF] Automatic Support for Irregular Computations in a High-Level Language

   ... or SMPs (CLUMPS) , and a number of specific supercomputer architectures (Cray X1 ... A is an array that resides on processor 1, and B is an index array owned by processor 0 ...
   www.cs.ucla.edu/~palsberg/course/cs239/papers/su.pdf — 2012-06-20T0

6. [PDF] Accelerating the Pace of Discovery

   Cray 1 supercomputer Univac III (transistors) Eniac IBM PC-XT Univac II ... Processor numbers differentiate features within each processor series, not across ...
   download.intel.com/newsroom/kits/idf/2011_fall/pdfs/IDF_HPC... — 2012-06-18T2

7. [PDF] Been There, Done That

   Chapter 1: Cray YMP/C90/J90/T90 (Aside: Cray did not know how to name machines) ... Much more expensive per processor than DMP machine. Poorer fault-tolerance properties.
   https://software.sandia.gov/mantevo/HerouxBeenThereDoneThat.pdf — 2012-06-19T0

8. [PDF] CSC Finland September 2009 CLE

   Cray XT systems have separated service work from compute intensive batch work. ... completed (/var/spool/PBS/spool) /proc can give you information on the processor ...
   www.csc.fi/csc/kurssit/arkisto/aineisto/hpce2-workshop/hpce2... — 2012-06-14T2

9. [PDF] Experiences and Challenges Scaling PFLOTRAN, a PETSc-based Code ...

   The Cray XT5 system has 672 OSTs, 1 MDS and 37,544 le system clients ... ferent processor counts on Cray XT5. The initial-ization phase almost entirely ...
   www.climatemodeling.org/~rmills/pubs/mills-PFLOTRAN_CUG2009.pdf — 2012-06-22T1

10. [PDF] CGGVeritas Accelerators Experience SAMPLE IMAGE

    Agenda Our environment FPGA on Cray XD-1 IBM Cell broadband engine ... Power Processor Element (64 bit PowerPC) EIB 512 MB XDRAM SPE I / O SPE SPE SPE SPE
    citi2.rice.edu/OG-HPC-WS/Guillaume%20THOMAS-COLLIGNON-CGGVeritas.pdf — 2012-06-22T2